Typically, caches are small, fast storage buffers employable to store information, such as instruction code or data, in order for a processing device to more quickly and efficiently have access to the information. Typically, it is faster for the processing device to read the smaller memory of the cache than to read a main memory. Also, with the rapid increase of intensive computational requirements, such as graphical processing and advanced numerical analysis, their importance in a computing system will only increase.
A cache is a limited resource. One way to allocate sets of a cache is to employ a least recently used (LRU) function to determine replacement of sets. Given the LRU information, the cache determines the last set accessed with the cache in the case of a cache miss. The cache replaces the LRU information within requested information in the event of a cache miss; that is, the cache did not have the requested information. This replacement allows the processor to quickly access the selected new information the next time this information is selected. Furthermore, this replacement also increases the chances of the processor finding associated information, as the replaced set cache data is likely to have temporal or spatial locality.
However, there are issues related to the employment of LRU functionality in caches. One such issue is that information to be stored to a cache does not utilize the cache in the same way. For instance, some information, such as streaming graphics, should ideally be immediately erased from the cache after the processor is finished reading the appropriate cache set, because this data is not to be used again. However, the LRU function would not immediately erase the streamed information, as the information would not necessarily be the least recently used. This results in an inefficient utilization of cache resources. Information selected by the processor a plurality of times would be erased by the LRU functionality if this data becomes the least recently used. For example, information that is accessed infrequently, but is critical to processor performance, could be erased.
Furthermore, there are also issues related to the interplay between an LRU function, such as a pseudo-LRU (pLRU) and the cache in real-time. For instance, real-time systems, such as a missile trajectory controller, needs both very fast access to algorithmic code and continual updating and replacement of navigation data, such as wind velocity. If the navigation data replaces the code in the cache, the length of time needed for operation of the controller becomes changeable, thereby leading to variances in the controller's real-time operations. Therefore, what is needed is cache information management that overcomes the limitations of conventional cache information management.